View A027DN01VB_7873302.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 1/62 customer approval sheet customer approval sheet customer approval sheet customer approval sheet customer customer customer customer model model model model a027dn01 vb customer customer customer customer approved approved approved approved please sign here a aa approval for specifications and c pproval for specifications and c pproval for specifications and c pproval for specifications and cs sample (spec. ver . s sample (spec. ver. s sample (spec. ver. s sample (spec. ver. 0. 0. 0. 0.8 88 8 ) ) ) ) auo auo auo auo sales sales sales sales pm pmpm pm bu head bu head bu head bu head * ] part no.: www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 2/62 doc. version: 0.8 total pages: 62 date: 2008/11/10 note: the content of this specification is subject to change without prior notice. ? 2008 au optronics all rights reserved, do not copy. model name: a 0 27 dn 01 v b product specification 2.7 color tft-lcd module < > preliminary specification < > final specification www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 3/62 record of revision version revise date page content 0.0 2008/03/06 first draft p11 update vgh and vcdc value p17 p18 update ups052 pal mode front porch value p51~p52 update power on/off sequence 0.1 2008/03/07 p53~p58 update register setting 0.2 2008/03/26 p6 update lcd weight. ( 18 => 16.5g ) p14 update hsync front porch max parameter p17~p18 update pal mode hsync front porch min parameter p23~p24 update pal mode hsync front porch and back proch min parameter 0.3 2008/05/02 p43 update 8 adjustable points fig p30 40 update r14 address setting 0.4 2008/05/26 p46 update esd testing conditions and add flow statement p12 change led driving conditions to backlight driving conditions and add note1, 2 p44-46 optical specification 1.update response time & view angle & note 7,8 & white chromaticity 2.add uniformity & note 10 p47-48 update reliability test items (high temperature storage cond itions & add note 3. esd testing method) p30 p43 update register data value 0.5 2008/06/25 p54~p59 update r86 setting value 0.6 2008/07/25 p53 update dac output frp data (white black) 0.7 2008/09/08 p13 update note of 3.4 backlight driving conditions www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 4/62 p45 update optical specification: viewing angle min value & r, g, b chromaticity & note 7 p51 update outline drawing 0.8 2008/11/10 p51 update outline drawing www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 5/62 contents a. physical specifications ......................... ................................................... ......................... 7 b. electrical specifications....................... ................................................... .......................... 8 1. pin assignment ....................................... ................................................... ..................................................8 2. absolute maximum ratings ................................ ................................................... ...................................11 3. electrical characteristics ................................. ................................................... ......................................12 3.1 recommended operating conditions (gnd=agnd=0v) ............ .................................................12 3.2 electrical characteristics (gnd=agnd=0v)................. ................................................... ..............12 3.3 recommended capacitance values of external capacitor............... ...........................................13 3.4 backlight driving conditions......................... ................................................... ...............................13 4. input timing ac characteristic ........................ ................................................... ......................................14 5. input timing format................................. ................................................... ................................................15 5.1 ups051 timing conditions (refer to fig.1 fig.2 fig.3) ...... ................................................... ........15 5.2 ups052 timing ....................................... ................................................... ........................................18 5.2.1 ups052 (320 mode/ntsc/24.535mhz) timing specifications. (refer to f ig.4 fig.5) ........18 5.2.2 ups052 (320 mode/pal/24.375mhz) timing specifications (refer to fig.4 fig.5) ............18 5.2.3 ups052 (360 mode/ntsc/27mhz) timing specifications (refer to fig.4 fig.5) ................19 5.2.4 ups052 (360 mode/pal/27mhz) timing specifications (refer to fig.4 fig.5) ...................19 5.3 ccir656 timing...................................... ................................................... .......................................22 5.3.1 ccir656 decoding .................................... ................................................... ..........................22 5.3.2 ccir656 ntsc ....................................... ................................................... .............................23 5.3.3 ccir656 pal ....................................... ................................................... ................................23 5.4 yuv 720 and yuv 640 timing ............................. ................................................... ..........................24 5.4.1 yuv 720 mode/ntsc timing specifications (refer to fig.7 fig.9) . ....................................24 5.4.2 yuv 720 mode/pal timing specifications (refer to fig.7 fig.9) . .......................................24 5.4.3 yuv 640 mode/ntsc timing specifications (refer to fig.8 fig.9) .....................................25 5.4.4 yuv 640 mode/pal timing specifications (refer to fig.8 fig.9) . .......................................25 5.5 ccir656/yuv 720/yuv 640 to rgb conversion................. ................................................... ........28 6. serial control interface ac characteristic................. ................................................... ...........................29 6.1 timing chart........................................ ................................................... ...........................................29 6.2 the configuration of serial data at sda terminal is at below ... ................................................... 30 6.3 register table...................................... ................................................... ...........................................31 6.4 register description .................................. ................................................... ...................................32 c. optical specification (note 1, note 2, note 3 ). ................................................... ........... 45 d. reliability test items .......................... ................................................... ........................... 48 e. packing form .................................... ................................................... ............................. 50 f. outline dimension ............................... ................................................... .......................... 51 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 6/62 g. application note ................................ ................................................... ............................ 52 1. application circuit ................................. ................................................... .................................................52 1.1 internal led drive backlight......................... ................................................... ................................52 1.2 external led drive backlight ........................... ................................................... ............................53 2. power on/off sequence ................................. ................................................... .........................................54 2.1 power on (standby disabling) ......................... ................................................... ............................54 3.2 power off (standby enabling) ........................ ................................................... ..............................55 3. recommended power on/off serial command settings............... ................................................... .......56 3.1 ups051 ............................................. ................................................... ..............................................56 3.2 ups052 320 mode ....................................... ................................................... ..................................57 3.3 ups052 360 mode ....................................... ................................................... ..................................58 3.4 ccir656........................................... ................................................... ...............................................59 3.5 yuv 720 ........................................... ................................................... ...............................................60 3.6 yuv 640 ........................................... ................................................... ...............................................61 4. power generation circuit ............................. ................................................... ..........................................62 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 7/62 a. physical specifications no. item specification remark 1 display resolution dot 960(w) x 240(h) 2 active area mm 54 x 40.5 3 screen size inch 2.658 (diagonal) 4 dot pitch um 56.25 x 168.75 5 color configuration r, g, b delta 6 overall dimension mm 63.5 x 46.6 x 2.6 note 1 7 weight g 16.5 8 panel surface treatment glare type note 1: refer to f. outline dimension www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 8/62 b. electrical specifications 1. pin assignment pin no symbol i/o i/o structure description remark 1 vcom i - panel common voltage 2 cs i type 3 serial command enable 3 sda i type 2 serial command data input 4 scl i type 1 serial command clock input 5 hsync i type 1 horizontal sync input 6 vsync i type 1 vertical sync input 7 dclk i type 1 data clock input 8 d7 i type 1 data input; msb 9 d6 i type 1 data input 10 d5 i type 1 data input 11 d4 i type 1 data input 12 d3 i type 1 data input 13 d2 i type 1 data input 14 d1 i type 1 data input 15 d0 i type 1 data input; lsb 16 gnd p - ground for digital circuit 17 vdd p - system power 3.0v~3.6v 18 dvdd c - power setting capacitor connect pin 19 v1 c - power setting capacitor connect pin 20 v2 c - power setting capacitor connect pin 21 v3 c - power setting capacitor connect pin 22 v4 c - power setting capacitor connect pin 23 vdd2 c - power setting capacitor connect pin 24 v5 c - power setting capacitor connect pin 25 v6 c - power setting capacitor connect pin 26 vdd3 c - power setting capacitor connect pin 27 vdd5 c - power setting capacitor connect pin 28 v7 c - power setting capacitor connect pin 29 v8 c - power setting capacitor connect pin 30 vgh c - power setting capacitor connect pin 31 vgl c - power setting capacitor connect pin 32 agnd p - ground for analog circuit www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 9/62 33 frp o type 4 frame polarity output for vcom 34 comdc o type 5 vcom dc voltage output pin 35 vcac c - power setting capacitor for vcom ac 36 drv p - vled boost transistor driving signal 37 vled p type 6 led power anode 38 fb p type 7 led power cathode 39 vcom i - panel common voltage i input, o output, c capacitor, p power, d dummy note: definition of scanning direction, refer to figure as below pin 1 pin 39 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 10/62 i/o pin structure: pull high/low resistor is 700k ? . www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 11/62 2. absolute maximum ratings item symbol condition min. max. unit remark supply voltage vdd agnd=gnd=0v -0.3 4.5 v vgh agnd=gnd=0v -0.3 16 v tft-lcd power voltage vgl agnd=gnd=0v -16 0.3 v input signal voltage cs,sda,scl,vsync, hsync,dclk,d0~d7 agnd=gnd=0v -0.3 4.5 v vcom ac output voltage frp agnd=gnd=0v -0.3 8 v vcom ac power voltage vcac agnd=gnd=0v -0.3 8 v vcom dc output voltage comdc agnd=gnd=0v -0.3 8 v vcom input voltage vcom agnd=gnd=0v -0.3 8 v vdd2 agnd=gnd=0v -0.3 8 v vdd3 agnd=gnd=0v -0.3 16 v vdd5 agnd=gnd=0v -0.3 20 v v1 agnd=gnd=0v -0.3 8 v v2 agnd=gnd=0v -0.3 8 v v3 agnd=gnd=0v -0.3 8 v v4 agnd=gnd=0v -0.3 8 v v5 agnd=gnd=0v -0.3 16 v v6 agnd=gnd=0v -0.3 16 v v7 agnd=gnd=0v -0.3 16 v charge pump voltage v8 agnd=gnd=0v -16 8 v storage temperature tstg - -25 80 ambient temperature operating temperature topa - 0 60 ambient temperature www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 12/62 3. electrical characteristics 3.1 recommended operating conditions (gnd=agnd=0v) item symbol min. typ. max. unit remark power supply vdd 3.0 3.3 3.6 v note 1 h level v ih 0.7* vdd - vdd v input signal l level v il gnd - 0.3* vdd v note 1: a build-in power on reset circuit for vdd i s provided within the integrated lcd driver ic. the lcd module is in power save mode in default, and a standby releasing is required after vdd power on through serial control. please refer to th e register stb setting for detail. 3.2 electrical characteristics (gnd=agnd=0v) parameter symbol condition min. typ. max. unit remark i dd - 6.6 8.5 note 1 input current for v dd i dd(standby) v dd =3.3v - 0.3 0.4 ma note 1 v gh v dd =3.3v 13 v note 2 dc-dc voltage v gl v dd =3.3v -10 v note 2 v cac - 3.6 4.2 4.8 vp-p ac component, note 3 vcom voltage v cdc - 0.26 v dc component, note 4 note 1: test condition: 8colorbar+grayscale pattern, ups051 mode, dclk=27mhz, frame rate: 60hz, other registers are default setting. note 2: v gh and v gl are output voltages of integrated lcd driver ic. note 3: the brightness of lcd panel could be adjusted by the adjustment of the ac component of vcom. note 4: v cdc could be adjusted, so as to minimize flicker and ma ximum contrast on each module. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 13/62 3.3 recommended capacitance values of external capacitor the recommended capacitance values of the external capacitor are shown below. these values should be finally determined only after performing sufficient evaluation on the module. pin name recommended value of capacitors ( f) withstanding voltage (v) vgh 4.7 to 10 25 vgl 4.7 to 10 16 vdd5 4.7 to 10 25 vdd3 4.7 to 10 16 vdd2 4.7 to 10 10 dvdd 4.7 to 10 6.3 vcac 4.7 to 10 10 v1, v2 2.2 to 10 10 v3, v4 2.2 to 10 10 v5, v6 2.2 to 10 16 v7, v8 2.2 to 10 16 3.4 backlight driving conditions parameter symbol min. typ. max. unit remark backlight current 25 27.5 ma note 1,2 backlight voltage v l 3.2 3.5 v 1pcs led feedback voltage v fb - 0.75 - v note1: to consider led driver and feedback resistor tolerance. note2: if using lcd internal led driver controller the maximum setting s hould be 25ma. ta=25 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 14/62 4. input timing ac characteristic (vdd=3.0 ~3.6v, agnd=gnd=0v, ta=25 ) parameter symbol min. typ. max. unit remark dclk duty cycle tcw 40 50 60 % vsync setup time tvst 6 - - ns vsync hold time tvhd 6 - - ns hsync setup time thst 6 - - ns hsync hold time thhd 6 - - ns data setup time tdst 6 - - ns data hold time tdhd 6 - - ns hsync width thsw 1 1 254 t dclk vsync width tvsw 1 t dclk 1 t dclk 6t h // 70 % dclk vsync hsync 30 % 30 % 30 % 30 % 30 % 30 % tvst tvhd tvsw thhd thst thsw // // www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 15/62 5. input timing format 5.1 ups051 timing conditions (refer to fig.1 fig.2 fig.3) note 1: the t hbp time is adjustable by setting register hblk; requir ement of minimum blanking time and minimum front porch time must be satisfied. note 2: the t vbp time is adjustable by setting register vblk. ups051 accepts both interlace and non-interlace vertical input timing. parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 13.5 27 27.19 mhz period t h 1024 1716 1728 t dclk display period t hd 960 t dclk back porch t hbp 50 70 255 t dclk note 1 front porch t hfp 14 686 513 t dclk hsync pulse width t hsw 1 1 t hbp - 1 t dclk odd period even t v 242.5 262.5 450.5 t h odd display period even t vd 240 t h odd 1 21 31 back porch even t vb 1.5 21.5 31.5 t h note 2 odd 1.5 1.5 179.5 front porch even t vfp 1 1 179 t h odd pulse width even t vsw 1 t dclk 1 t dclk 6 t h vsync 1 frame 485 525 901 t h www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 16/62 fig.1 ups051 input horizontal timing chart fig.2 ups051 input horizontal data sequence hsync r g b r g b r g b r g g b r g b r g b r g b r b line 2,4,6 240 line 1,3,5 239 1 invalid data invalid data t hbp t hd 2 3 960 data t hfp t h = t hbp + t hd + t hfp hsync dclk t hsw www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 17/62 hsync vsync valid data valid data data 1 field ( odd ) 1 field ( even ) v display v display v blanking v blanking 1 frame t vd t vd t v t v t vs w t vfp t vfp t vbp t vbp fig.3 ups051 input vertical timing chart www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 18/62 5.2 ups052 timing 5.2.1 ups052 (320 mode/ntsc/24.535mhz) timing specifications. (refer to fig.4 fig.5) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 20.54 24.535 30 mhz period t h 1306 1560 1907 t dclk display period t hd - 1280 - t dclk back porch t hbp 2 241 255 t dclk front porch t hfp 24 39 372 t dclk hsync pulse width t hsw 1 1 200 t dclk odd period eve n t v 242.5 262.5 450.5 t h odd display period eve n t vd - 240 - t h odd 1 21 31 back porch eve n t vbp 1.5 21.5 31.5 t h odd 1.5 1.5 179.5 front porch eve n t vfp 1 1 179 t h odd pulse width eve n t vsw 1 1 200 t dclk vsync 1 frame 485 525 901 t h 5.2.2 ups052 (320 mode/pal/24.375mhz) timing specifications (refer to fig.4 fig.5) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 20.4 24.375 30 mhz period t h 1306 1560 1920 t dclk display period t hd - 1280 - t dclk back porch t hbp 3 241 255 t dclk front porch t hfp 23 39 385 t dclk hsync pulse width t hsw 1 1 200 t dclk odd period eve n t v 292.5 312.5 450.5 t h odd display period eve n t vd - 288 - t h odd 3 24 34 back porch eve n t vbp 3.5 24.5 34.5 t h odd 1.5 0.5 128.5 front porch eve n t vfp 1 0 128 t h odd pulse width eve n t vsw 1 1 200 t dclk vsync 1 frame 585 625 901 t h www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 19/62 5.2.3 ups052 (360 mode/ntsc/27mhz) timing specifications (refer to fi g.4 fig.5) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23 27 30 mhz period t h 1466 1716 1907 t dclk display period t hd - 1440 - t dclk back porch t hbp 2 241 255 t dclk front porch t hfp 24 35 212 t dclk hsync pulse width t hsw 1 1 200 t dclk odd period even t v 242.5 262.5 450.5 t h odd display period even t vd - 240 - t h odd 1 21 31 back porch even t vbp 1.5 21.5 31.5 t h odd 1.5 1.5 179.5 front porch even t vfp 1 1 179 t h odd pulse width even t vsw 1 1 200 t dclk vsync 1 frame 485 525 901 t h 5.2.4 ups052 (360 mode/pal/27mhz) timing specifications (refer to fi g.4 fig.5) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23 27 30 mhz period t h 1466 1728 1920 t dclk display period t hd - 1440 - t dclk back porch t hbp 3 241 255 t dclk front porch t hfp 23 47 225 t dclk hsync pulse width t hsw 1 1 200 t dclk odd period even t v 292.5 312.5 450.5 t h odd display period even t vd - 288 - t h odd 3 24 34 back porch even t vbp 3.5 24.5 34.5 t h odd 1.5 0.5 128.5 front porch even t vfp 1 0 128 t h odd pulse width even t vsw 1 1 200 t dclk vsync 1 frame 585 625 901 t h www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 20/62 r0 invalid data invalid data t hbp t hd g 0 b0 n data t hfp t h = t hbp + t hd + t hfp hsync dclk t hsw dm r1 g 1 b1 dm fig.4 ups052 input horizontal timing chart www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 21/62 hsync vsync valid data valid data data 1 field ( odd ) 1 field ( even ) v display v display v blanking v blanking 1 frame t vd t vd t v t v t vs w t vfp t vfp t vbp t vbp fig.5 ups052 input vertical timing chart www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 22/62 5.3 ccir656 timing fig.6 ccir656 data input format 5.3.1 ccir656 decoding ff 00 00 < xy > signals are involved with hsync, vsync and fie ld encode following bits: f=field select : f=0 for field 1, f=1 for field 2; v=1 during vertical blanking h=0 at sav , h=1 at eav , p3-p0=protection bits : p3=v h p2=f h p1=f v p0=f v h : represents the exclusive -or function control is provided through end of video (eav) and start of video (s av) timing references. horizontal blanking section consists of repeating pattern 80 10 80 10 xy d7(msb) d6 d5 d4 d3 d2 d1 d0(lsb) 1 f v h p3 p2 p1 p0 ffh invalid data invalid data data dclk (27mhz) 00h 00h xy cb0 y0 cr0 y1 cb 718 y718 cr 718 y719 ffh 00h 00h xy 720 ccir valid data (sav) (eav) note: under the register cbcr=0 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 23/62 5.3.2 ccir656 ntsc 5.3.3 ccir656 pal line number f v h (eav) h (sav) 1-3 1 1 1 0 4-22 0 1 1 0 23-262 0 0 1 0 263-265 0 1 1 0 266-285 1 1 1 0 286-525 1 0 1 0 f h v 1 even field eav blanking 0 odd field sav active video line number f v h (eav) h (sav) 1-22 0 1 1 0 23-310 0 0 1 0 311-312 0 1 1 0 313-335 1 1 1 0 335-623 1 0 1 0 624-625 1 1 1 0 f h v 1 even field eav blanking 0 odd field sav active video blanking field 1 active video blanking field 2 active video line 1(v=1) line 23(v=0) line 263(v=1) line 286(v=0) line 525(v=0) line 3 line 266 line 4 filed 1 (f=0) odd filed 2 (f=1) even h = 1 eav h = 0 sav blanking field 1 active video blanking field 2 active video line 1(v=1) line 23(v=0) line 311(v=1) line 624(v=1) line 625(v=1) line 625 line 313 line 1 fil ed 1 (f=0) odd filed 2 (f=1) even h = 1 eav h = 0 sav line 336(v=0) www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 24/62 5.4 yuv 720 and yuv 640 timing 5.4.1 yuv 720 mode/ntsc timing specifications (refer to fig.7 fig.9) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23 27 30 mhz period t h 1476 1716 1907 t dclk display period t hd - 1440 - t dclk back porch t hbp 2 240 255 t dclk front porch t hfp 34 36 212 t dclk hsync pulse width t hsw - 1 - t dclk odd period even t v 242.5 262.5 450.5 t h odd display period even t vd - 240 - t h odd 1 21 31 back porch even t vbp 1.5 21.5 31.5 t h odd 1.5 1.5 179.5 front porch even t vfp 1 1 179 t h odd pulse width even t vsw - 1 - t dclk vsync 1 frame 485 525 901 t h 5.4.2 yuv 720 mode/pal timing specifications (refer to fig.7 fig.9) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 23 27 30 mhz period t h 1476 1728 1920 t dclk display period t hd - 1440 - t dclk back porch t hbp 3 240 255 t dclk front porch t hfp 33 48 225 t dclk hsync pulse width t hsw - 1 - t dclk odd period even t v 292.5 312.5 450.5 t h odd display period even t vd - 288 - t h odd 3 24 34 back porch even t vbp 3.5 24.5 34.5 t h odd 1.5 0.5 128.5 front porch even t vfp 1 0 128 t h odd pulse width even t vsw - 1 - t dclk vsync 1 frame 585 625 901 t h www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 25/62 5.4.3 yuv 640 mode/ntsc timing specifications (refer to fig.8 fig.9) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 20.65 24.535 30 mhz period t h 1314 1560 1907 t dclk display period t hd - 1280 - t dclk back porch t hbp 2 240 255 t dclk front porch t hfp 32 40 372 t dclk hsync pulse width t hsw - 1 - t dclk odd period eve n t v 242.5 262.5 450.5 t h odd display period eve n t vd - 240 - t h odd 1 21 31 back porch eve n t vbp 1.5 21.5 31.5 t h odd 1.5 1.5 179.5 front porch eve n t vfp 1 1 179 t h odd pulse width eve n t vsw - 1 - t dclk vsync 1 frame 485 525 901 t h 5.4.4 yuv 640 mode/pal timing specifications (refer to fig.8 fig.9) parameter symbol min. typ. max. unit. remark dclk frequency 1/t dclk 20.5 24.375 30 mhz period t h 1314 1560 1920 t dclk display period t hd - 1280 - t dclk back porch t hbp 3 240 255 t dclk front porch t hfp 31 40 385 t dclk hsync pulse width t hsw - 1 - t dclk odd period eve n t v 292.5 312.5 450.5 t h odd display period eve n t vd - 288 - t h odd 3 24 34 back porch eve n t vbp 3.5 24.5 34.5 t h odd 1.5 0.5 128.5 front porch eve n t vfp 1 0 128 t h odd pulse width eve n t vsw - 1 - t dclk vsync 1 frame 585 625 901 t h www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 26/62 fig.7 yuv720 input horizontal timing chart fig.8 yuv640 input horizontal timing chart cb0 invalid data invalid data hd data hsync dclk t hsw ntsc:1716 / pal:1728 240 y0 cr0 y1 y2 y3 cb2 cr2 y 719 cr 718 y 718 cb 718 y 717 y 716 cr 716 cb 716 1440 when cbcr=0 and y_cbcr=0 t hbp t h t hd t hfp cb0 invalid data invalid data hd data hsync dclk t hsw ntsc:1560 / pal:1560 y0 cr0 y1 y2 y3 cb2 cr2 y 639 cr 638 y 638 cb 638 y 637 y 636 cr 636 cb 636 1280 when cbcr=0 and y_cbcr=0 t hbp t h t hd t hfp www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 27/62 hsync vsync valid data valid data data 1 field ( odd ) 1 field ( even ) v display v display v blanking v blanking 1 frame t vd t vd t v t v t vs w t vfp t vfp t vbp t vbp fig.9 yuv input vertical timing chart www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 28/62 5.5 ccir656/yuv 720/yuv 640 to rgb conversion r n =1.164*[(y 2n-1 +y 2n )/2-16] + 1.596*(c rn -128) g n =1.164*[(y 2n-1 +y 2n )/2-16] - 0.813*(c rn -128) - 0.392*(c bn -128) b n =1.164*[(y 2n-1 +y 2n )/2-16] + 2.017*(c bn-128) where y:16~235 c r :16~240 c b :16~240 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 29/62 6. serial control interface ac characteristic item symbol min typical max unit cs input setup time t s0 50 - - ns serial data input setup time t s1 50 - -- ns cs input hold time t h0 50 - - ns serial data input hold time t h1 50 - - ns scl pulse low width t w1l 50 - - ns scl pulse high width t w1h 50 - - ns cs pulse high width t w2 400 - - ns 6.1 timing chart 1. each serial command consists of 16 bits of data which is loaded one bit a time at the rising edge of serial clock scl. 2. command loading operation starts from the falling edge of cs and is completed at the next rising edge of cs. 3. the serial control block is operational after power on reset, but commands are es tablished by the vsync signal. if command is transferred multiple times for the same register, the l ast command before the vsync signal is valid. 4. if less than 16 bits of scl are input while cs is low, the trans ferred data is ignored. 5. if 16 bits or more of scl are input while cs is low, the previous 16 bi ts of transferred data after the falling edge of cs pulse are valid data. 6. serial block operates with the scl clock. 7. serial data can be accepted in the standby (power save) mode. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 30/62 6.2 the configuration of serial data at sda terminal is at below msb lsb a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 address r/w address data r/w : establishes the read mode when set to 1, and the write mode when set to 0. write mode: www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 31/62 6.3 register table register address msb register data (default setting) l sb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 0 0 0 y_cbcr (0) ccir601 (0) x x vcac (0) vcom_ac (011) r1 0 0 0 0 0 0 0 1 vcdce (1) x vcom_dc (0ah) r3 0 0 0 0 0 0 1 1 brightness (40h) r4 0 0 0 0 0 1 0 0 narrow (0) yuv (0) sel (00) ntsc/pal (10) vdir (1) hdir (1) r5 0 0 0 0 0 1 0 1 drv_freq (0) grb (1) pfm_duty (011) shdb2 (1) shdb1 (1) stb (0) r6 0 0 0 0 0 1 1 0 hblk_en (0) led_current (00) vblk (15h) r7 0 0 0 0 0 1 1 1 hblk(46h) r8 0 0 0 0 1 0 0 0 bl_drv (00) x x x x x x r12 0 0 0 0 1 1 0 0 pair (00) x cbcr (0) x vdpol (1) hdpol (1) dclkpol (0) r13 0 0 0 0 1 1 0 1 contrast_rgb (40h) r14 0 0 0 0 1 1 1 0 x sub-contrast_r (40h) r15 0 0 0 0 1 1 1 1 x sub-brightness_r (40h) r16 0 0 0 1 0 0 0 0 x sub-contrast_b (40h) r17 0 0 0 1 0 0 0 1 x sub-brightness_b (40h) r21 0 0 0 1 0 1 0 1 led_on_cycle (0111) led_on_ratio (1111) r22 0 0 0 1 0 1 1 0 x x x x x gamma setting (1) x x r23 0 0 0 1 0 1 1 1 x x gma_v8(01) x x gma_v4(01) r24 0 0 0 1 1 0 0 0 x x gma_v25(10) x x gma_v16(10) r25 0 0 0 1 1 0 0 1 x x gma_v48(10) x x gma_v36(10) r26 0 0 0 1 1 0 1 0 x x gma_v60(10) x x gma_v55(10) r86 1 0 0 1 0 1 1 0 x x x x 0 1 vgh_sel(11) note: 1. x => please set to 0. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 32/62 6.4 register description r0: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 0 0 0 y_cbcr(0) ccir601 (0) x x vcac(0) vcom_ac(011) vcom_ac: common voltage ac level selection (deviation 0.1v) vcom_ac vcac d2 d1 d0 d3 voltage (v) 0 0 0 0 3.6 0 0 0 1 3.7 0 0 1 0 3.8 0 0 1 1 3.9 0 1 0 0 4.0 0 1 0 1 4.1 0 1 1 0 4.2(default) 0 1 1 1 4.3 1 0 0 0 4.4 1 0 0 1 4.5 1 0 1 0 4.6 1 0 1 1 4.7 1 1 x x 4.8 ccir601: ccir601 input timing selection ccir601 function 0(default) disable ccir601 (default) 1 enable ccir601. (please refer to the table of r4(sel) for detail descripti on) y_cbcr: y & cbcr exchange position (only valid for 8-bit input yu v640 / yuv720) cbcr(r12[4])=0 cbcr(r12[4])=1 y_cbcr=0 (default) cb0 y0 cr0 y1 cb2 y2 cr2 y3 cr0 y0 cb0 y1 cr2 y2 cb2 y3 y_cbcr=1 y0 cb0 y1 cr0 y2 cb2 y3 cr2 y0 cr0 y1 cb0 y2 cr2 y3 cb2 frp output vcom_ac frp output www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 33/62 r1: register address msb register data lsb no a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r1 0 0 0 0 0 0 0 1 vcdce (1) x vcom_dc (0ah) vcom_dc: common voltage dc level selection (20mv/step) d5~d0 vcom dc level (v) 00h 0.10 : : 0ah(default) 0.30(default) : : 3fh 1.36 vcdce: vcom_dc function enable setting vcdce function 0 vcom _dc function disable. the comdc pin is hi-z. 1 vcom_dc function enable. the comdc voltage follows vcom_dc sett ing. (default) r3: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r3 0 0 0 0 0 0 1 1 brightness (40h) brightness: rgb bright level setting, setting accuracy: 1 step / bit d7 ~ d0 brightness gain 00h dark (-64) 40h(default) center (0) (default) ffh bright (+191) www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 34/62 r4: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r4 0 0 0 0 0 1 0 0 narrow(0) yuv(0) sel(00) ntsc/pal(10) vdir(1) hdir(1) hdir: horizontal scan direction setting hdir function 0 right to left scan 1 left to right scan (default) vdir: vertical scan direction setting vdir function 0 down to up scan 1 up to down scan (default) ntsc/pal: ntsc or pal input mode selection (for ups052 input timing) ntsc/pal d3 d2 mode 0 0 pal 0 1 ntsc 1 x auto detection (default) sel: input data timing format selection sel ccir601 yuv d5 d4 input timing format 0 0 0 0 ups051 (default) 0 0 0 1 ups052 320 240 0 0 1 x ups052 360 240 0 1 1 x ccir656 1 1 0 x yuv 640(*) 1 1 1 x yuv 720(*) (*)please refer to yuv640/yuv720 horizontal timing spec for detailed descri ption. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 35/62 yuv: yuv (ccir656, yuv640, yuv720) or rgb input selection yuv function 0 rgb input ( default) 1 ccir656 / yuv640 / yuv720 input. when this command is sent to driver ic,it will be executed immediately narrow: normal display and narrow display selection. narrow function 0 normal display (default) 1 narrow display narrow=0 narrow=1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 36/62 r5: register address msb register data lsb no a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r5 0 0 0 0 0 1 0 1 drv_freq(0) grb(1) pfm_duty(011) shdb2(1) shdb1(1) stb(0) stb: standby (power saving) mode setting stb function 0 standby mode (default) 1 normal operation shdb1: shut down for back light power converter shdb1 function 0 the back light power converter is off 1 the back light power converter is controlled by power on/off sequence (default ) shdb2: shut down for vgh/vgl charge pump shdb2 function 0 vgh/vgl charge pump is always off 1 vgh/vgl charge pump is controlled by power on/off sequence (default) pfm_duty: pfm duty cycle selection for back light power converter pfm_duty function d5 d4 d3 pfm duty cycle 0 0 0 50% 0 0 1 60% 0 1 0 65% 0 1 1 70%(default) 1 0 0 75% 1 0 1 80% 1 1 0 85% 1 1 1 90% grb: register reset setting grb function 0 reset all registers to default value 1 normal operation (default) when this command is sent to driver ic,it will be executed immediately drv_freq: drv signal frequency setting drv_freq drv frequency 0(default) dclk / 64 1 dclk / 128 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 37/62 r6: register address msb register data lsb no a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r6 0 0 0 0 0 1 1 0 hblk_en(0) led_current(00) vblk(15h) vblk: vertical blanking setting ups051, ups052, yuv640 and yuv720 ntsc mode d4 ~ d0 vblk unit 01h 1 15h 21(default) 1fh 31 h (line) ccir656 ntsc mode d4 ~ d0 vblk unit 01h 1 16h 22(default) 1fh 31 h (line) ups052, ccir656 and yuv640 and yuv720 pal mode(vertical blanking + 3) d4 ~ d0 vblk unit 00h 3 15h 24(default) 1fh 34 h (line) note: v-blanking must be adjusted based on the input data. led_current: adjust led current dc-dc feedback voltage d6 d5 feedback threshold voltage 0 0 0.6v(20ma) (default) 0 1 0.75v(25ma) 1 0 0.45v(15ma) 1 1 0.3v(10ma) www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 38/62 r6 & r7: register address msb register data lsb no a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r6 0 0 0 0 0 1 1 0 hblk_en(0) led_current(00) vblk(15h) r7 0 0 0 0 0 1 1 1 hblk(46h) hblk_en & hblk: horizontal blanking setting hblk_en hblk(d7~d0) hblk unit remark x 32h 50 x 46h 70(default) x ffh 255 dclk(*) ups051 0 - 241(fixed) dclk(*) 1 02h~ff 2~255 dclk(*) ups052 0 - 240(fixed) dclk(*) 1 02h ~ ffh 2 ~ 255 dclk(*) yuv640, yuv720 *the frequency of dclk is different under different input timing. r8: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r8 0 0 0 0 1 0 0 0 bl_drv(00) x x x x x x bl_drv: backlight driving capability setting d7 d6 bl_drv capability 0 0 normal capability (default) 0 1 2 times the normal capability 1 0 4 times the normal capability 1 1 8 times the normal capability www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 39/62 r12: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r12 0 0 0 0 1 1 0 0 pair(00) x cbcr(0) x vdpol(1) hdpol(1) dclkpol(0) dclkpol: dclk polarity selection dclkpol function 0 positive polarity (default) 1 negative polarity hdpol: hsync polarity selection hdpol function 0 positive polarity 1 negative polarity (default) vdpol: vsync polarity selection vdpol function 0 positive polarity 1 negative polarity (default) d1 d2 d3 d4 vsync hsync dclk data hdpol=1, vdpol=1, dclkpol=0 d1 d2 d3 d4 vsync hsync dclk data hdpol=0, vdpol=0, dclkpol=1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 40/62 cbcr: cb & cr exchange position, (please refer to the table of r0( y_cbcr) for detail description) pair: vertical start time setting for odd/even frame ups051 / ups052 ntsc / ups052 pal (*) pair vblk d7 d6 odd/even unit x 0 21/21(default) x 1 21/20 h (line) ccir656/yuv640/yuv720 ntsc/pal (**) pair vblk d7 d6 odd/even unit 0 0 22/22 0 1 22/23 1 0 23/22 1 1 23/23 h (line) (*)the typical value of vblk of ups052 pal(24 h) is different than ups05 1/ups052 ntsc(21h). (**) the typical value of vblk of ccir656 pal(24 h) is different tha n ccir656 ntsc(22h). note: v-blanking must be adjusted based on the input data. for example: this table is based on vblk=21. 523 284 524 285 even 261 22 261 22 odd end start end start line pair=1 pair=0 field 262 1 2 21 22 23 264 26 5 284 285 28 6 263 525 21 21 vsync hsync cb0 y0 cr0 y1 cb2 y2 cr2 y3 cbcr=0 cbcr=1 cr0 y0 cb0 y1 cr2 y2 cb2 y3 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 41/62 r13: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r13 0 0 0 0 1 1 0 1 contrast_rgb(40h) contrast_rgb: rgb contrast level setting, the gain changes (1/64) / bit d7 ~ d0 contrast gain 00h 0 40h 1(default) ffh 3.984 r14~r17: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r14 0 0 0 0 1 1 1 0 x sub-contrast_r(40h) r16 0 0 0 1 0 0 0 0 x sub-contrast_b(40h) sub-contrast: r/b sub-contrast level setting, the gain changes (1/ 256) / bit d6 ~ d0 brightness gain 00h 0.75 40h 1(default) 7fh 1.246 register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r15 0 0 0 0 1 1 1 1 x sub-brightness_r(40h) r17 0 0 0 1 0 0 0 1 x sub-brightness_b(40h) sub-brightness: r/b sub-bright level setting, setting accuracy : 1 step / bit d6 ~ d0 brightness gain 00h dark (-64) 40h center (0)(default) 7fh bright (+63) www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 42/62 r21: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r21 0 0 0 1 0 1 0 1 led_on_cycle (0111) led_on_ratio (1111) led_on_ratio: set the active ratio of enable signal, and we can use it to adjust brightness of the leds. led_on_ratio d3 d2 d1 d0 value 0 0 0 0 1/16 0 0 0 1 2/16 0 0 1 0 3/16 0 0 1 1 4/16 0 1 0 0 5/16 0 1 0 1 6/16 0 1 1 0 7/16 0 1 1 1 8/16 1 0 0 0 9/16 1 0 0 1 10/16 1 0 1 0 11/16 1 0 1 1 12/16 1 1 0 0 13/16 1 1 0 1 14/16 1 1 1 0 15/16 1 1 1 1 16/16(default) led_on_cycle : set the cycle of enable signal , and we can use it to adjust brightness of the leds. led_on_cycle d7 d6 d5 d4 value 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8(default) 1 0 0 0 9 1 0 0 1 10 1 0 1 0 11 1 0 1 1 12 1 1 0 0 13 1 1 0 1 14 1 1 1 0 15 1 1 1 1 16 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 43/62 enable signal disable enable hsync drv cycle 16 led_on_cycle led_on_cycle (led_on_ratio 16 ) led_on_cycle (16 led_on_ratio 16) (cycle) (enable) (disable) unit : hsync for example: led_on_ratio is 1001 , and led_on_cycle is 0111 , then: cycle = 16 8 = 128(hsync) enable = 8 (( 10/16 ) 16) = 80(hsync) disable = 8 (16-( 10/16 ) 16) = 48(hsync) 62.5% on r22: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r22 0 0 0 1 0 1 1 0 x x x x x gamma2.2(1) x x gamma2.2 setting : select auto or manual gamma setting gamma setting description 0 manual set gamma by r23 ~ r26. 1 auto set to default gamma (close to 2.2). www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 44/62 r23 ~ r26: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r23 0 0 0 1 0 1 1 1 x x gma_v8 (01) x x gma_v4 (01) r24 0 0 0 1 1 0 0 0 x x gma_v25 (10) x x gma_v16 (10) r25 0 0 0 1 1 0 0 1 x x gma_v48 (10) x x gma_v36 (10) r26 0 0 0 1 1 0 1 0 x x gma_v60 (10) x x gma_v55 (10) 8 adjustable points gamma curve 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 0 8 16 24 32 40 48 56 gray t r86: register address msb register data lsb no. a6 r/w a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 r86 1 0 0 1 0 1 1 0 x x x x 0 1 vgh_sel(11) vgh_sel: vgh voltage selection vgh_sel d1 d0 vgh voltage (v) 0 0 12 0 1 13 1 0 14 1 1 15 (default) www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 45/62 c. optical specification (note 1, note 2, note 3 ) item symbol condition min. typ. max. unit remark response time rise fall tr tf =0 - - 10 25 40 50 ms ms note 4 contrast ratio cr at optimized viewing angle 200 300 - note 5,6 viewing angle top bottom left right t b l r cr R 10 40 50 50 50 50 60 60 60 - - - - deg. note 7 brightness y l =0 200 250 - cd/m 2 note 8 x =0 (0.26) (0.31) (0.36) white chromaticity y =0 (0.30) (0.35) (0.40) x =0 (0.53) (0.58) (0.63) red chromaticity y =0 (0.28) (0.33) (0.38) x =0 (0.30) (0.35) (0.40) green chromaticity y =0 (0.53) (0.58) (0.63) x =0 (0.11) (0.16) (0.21) blue chromaticity y =0 (0.10) (0.15) (0.20) uniformity y l % 70 75 -- % note 10 note 1. ambient temperature =25 . note 2. to be measured in the dark room. note 3.to be measured on the center area of panel wit h a field angle of 1 by topcon luminance meter bm-7, after 10 minutes operation. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 46/62 note 4. definition of response time: the output signals of photo detector are measured when the input signals are changed from black to white(falling time) and from white to black (rising time), respectively. the response time is defined as the time interval be tween the 10% and 90% of amplitudes. refer to figure as below. note 5. definition of contrast ratio: contrast ratio is calculated with the following formula . photo detector output when lcd is at white state photo detector output when lcd is at black state note 6. white vi=v i50 1.5v black vi=v i50 2.0v means that the analog input signal swings in phase with com signal. means that the analog input signal swings out o f phase with com signal. v i50 : the analog input voltage when transmission is 50% the 100% transmission is defined as the transmission of l cd panel when all the input terminals of module are electrically opened. note 7. definition of viewing angle, , refer to figure as below. s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% contrast ratio (cr)= www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 47/62 note 8. measured at the center area of the panel in gr ay level 255. note 9. color filter arrangement note 10 luminance uniformity of these 9 points is defined a s below: 9) - (1 points 9 in luminance maximum 9) - (1 points 9 in luminance minimum uniformity = www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 48/62 d. reliability test items no. test items conditions remark 1 high temperature storage ta= 70 240hrs 2 low temperature storage ta= -25 240hrs 3 high temperature operation ta= 60 240hrs 4 low temperature operation ta= 0 240hrs 5 high temperature and high humidity ta= 60 . 90% rh 240hrs operation 6 heat shock -25 ~80 /50 cycle 2hrs/cycle non-operation 7 electrostatic discharge air-mode : +/- 8kv contact-mode : +/- 4kv note.2, 3 frequency range : 10~55hz stoke : 1.5mm sweep : 10~55hz~10hz 2 hours for each direction of x,y,z 8 vibration (6 hours for total) non-operation jis c7021, a-10 condition a 9 mechanical shock 100g . 6ms, x, y, z 3 times for each direction non-operation jis c7021, a-7 condition c 10 vibration (with carton) random vibration: 0.015g 2 /hz from 5~200hz C6db/octave from 200~500hz iec 68-34 11 drop (with carton) height: 60cm 1 corner, 3 edges, 6 surfaces note1: ta: ambient temperature. note2: esd testing flow as the below, lcd power on, functional check electrostatic discharge functional check & judge the results www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 49/62 note 3. esd testing method. 1. ambient: 24~26 , 56~65%rh 2. instruments:noisekeness-2000, 3. operation system: cx40fl-b and adapter a027dn01 vb 4. test mode: operating mode, test pattern: colorbar+8gray scale 5. test method: a. contact discharge: 150pf(330?) 1sec, 5 points, 10 times/point b. air discharge: 150pf(330?) 1sec, 5 points, 10 times/point 6. test point: display area bezel auo 1 2 3 4 5 7. the metal casing is connected to power supply ground (0v) at four corners. 8. all register commands are repeating transfer. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 50/62 e. packing form dn b www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb product spec version 0.8 page 51/62 f. outline dimension printing white line www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 52/62 g. application note 1. application circuit 1.1 internal led drive backlight note1: use internal led driver must set r5[1](shdb1)= 1. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 53/62 1.2 external led drive backlight note2: use external led driver must set r5[1](shdb1)= 0. www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 54/62 2. power on/off sequence the register setting of standby mode disabling / enabling is used to control the buil d-in power on / off sequence. 2.1 power on (standby disabling) after vdd power on reset, vsync/hsync/dclk/data can be input, a nd serial control interface is also operational. the lcd driver is in default standby mode after vdd power-on, and set ting register r5: stb to 1 to disable the standby mode is required for normal operation. when the standby mode is disabled, a build-in power on sequence is started. the lcd positive and negative power supplies vgh/vgl are pumped first, and followed by the led power vled. please refer to fig.10 for t he detail timing of power on sequence. fig.10 power on sequence www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 55/62 3.2 power off (standby enabling) when the register stb is set to 0 to enable standby mode, a build-in p ower off sequence is started. please refer to fig.11 for the detail timing of power off sequence. fig.11 power off sequence www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 56/62 3. recommended power on/off serial command settings 3.1 ups051 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 57/62 3.2 ups052 320 mode min: 0ms max: 50ms min:1 field power on power off vdd 5eh input serial setting register r5 set standby dclk / hsync / vsync / data input 5 fields (1 field: ntsc=16.6ms; pal=20ms) dclk / hsync / vsync / data input vdd input register r4 1bh set ups052 320 mode 1eh r5 global reset r5 5eh global reset recovery min: 0ms 5fh release standby r5 05 h set vgh=13v r86 35h set backlight current=25ma r6 8 8 h set vcdc=0.26v r1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 58/62 3.3 ups052 360 mode min: 0ms max: 50ms min:1 field set ups052 360 mode power on power off vdd 5eh input serial setting register r5 set standby dclk / hsync / vsync / data input 5 fields (1 field: ntsc=16.6ms; pal=20ms) dclk / hsync / vsync / data input vdd input register r4 2bh 1eh r5 global reset r5 5eh global reset recovery min: 0ms 5fh release standby r5 0 5 h set vgh=13v r86 35h set backlight current=25ma r6 set vcdc=0.26v 8 8 h r1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 59/62 3.4 ccir656 min: 0ms max: 50ms min:1 field r4 6bh set ccir656 mode 1eh r5 global reset r5 5eh global reset recovery power on power off vdd 5eh input serial setting register r5 set standby dclk / hsync / vsync / data input 5 fields (1 field: ntsc=16.6ms; pal=20ms) dclk / hsync / vsync / data input vdd input register min: 0ms 5fh release standby r5 0 5 h set vgh=13v r86 35h set backlight current=25ma r6 88 h set vcdc=0.26v r1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 60/62 3.5 yuv 720 min: 0ms max: 50ms min:1 field r0 43h 1eh global reset 5eh global reset recovery r5 r5 set ccir601=1 power on dclk / hsync / vsync / data input vdd input register r4 6bh set yuv 720 mode power off vdd 5eh input serial setting register r5 set standby dclk / hsync / vsync / data input 5 fields (1 field: ntsc=16.6ms; pal=20ms) min: 0ms 5fh release standby r5 0 5 h set vgh=13v r86 35 h set backlight current=25ma r6 8 8 h set vcdc=0.26v r1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 61/62 3.6 yuv 640 min: 0ms max: 50ms min:1 field r0 43h 1eh global reset 5eh global reset recovery r5 r5 set ccir601=1 power on dclk / hsync / vsync / data input vdd input register r4 4bh set yuv 640 mode power off vdd 5eh input serial setting register r5 set standby dclk / hsync / vsync / data input 5 fields (1 field: ntsc=16.6ms; pal=20ms) min: 0ms 5fh release standby r5 0 5 h set vgh=13v r86 35 h set backlight current=25ma r6 set vcdc=0.26v 8 8 h r1 www.datasheet.co.kr datasheet pdf - http://www..net/
all rights strictly reserved. any portion of this pr per shall not be reproduced, copied, or transformed to any other forms without permission f rom au optronics corp. a027dn01 vb application note version 0.0 page 62/62 4. power generation circuit the black diagram of built-in power generation circuit for tft-lcd supply power i s shown as below: www.datasheet.co.kr datasheet pdf - http://www..net/

▲Up To Search▲

Price & Availability of A027DN01VB

	To Download A027DN01VB Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .